Forum Discussion
KianHinT_altera
Frequent Contributor
4 months agoHi Harsath,
Thanks for using Altera forums.
For the queries above, could you refer to the datamover design example that showcase using fpga to hps bridge and accesses to SDRAM controller if you have already certified that reading data from ADC have no issues, just the storing and reading back from SDRAM portion.
some alternative info I found
https://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/HPS_peripherials/FPGA_addr_index.html
https://www.rocketboards.org/foswiki/Projects/Datamover
Thanks
Regards
Kian