Honored Contributor
Honored ContributorRegarding the IRAM,
the T51 core's IRAM (which is not the same as the integrated XRAM, that one get's mapped to M4K) originally had an assynchronous reset which, AFAIK, it's not supported by M4K. I'm also convinced that the write-to-read behaviour, although it can be implemented using M4K and a bit more of logic, was described in VHDL in such way that Quartus does not recognize. But I'm not 100% sure. Regarding the ROM, I got the way I wrote from the thread you're mentioning, after you kindly pointed me to it. :)
