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Shiva's avatar
Shiva
Icon for New Contributor rankNew Contributor
7 years ago

MAX 10 FPGA Remote System Upgrade (RSU)

Hi, I am trying remote system upgrade for MAX10 FPGA device, Here i am able to write and read the rpd data of CFM1 but when i trigger the reconfiguration it is not getting reconfigured. I am doing t...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

The write signal as long as the wait_request is high the signalTap does not tap this signal.

May I know if you have check on your Quartus design to see if there is any timing violation? Are you able to SignalTap all the Avalon-MM signal and collect the write and read on single address?

Shiva's avatar
Shiva
Icon for New Contributor rankNew Contributor
6 years ago

Hi,

There is no timing violation.

please find the attachment of stp files includes write and read operations through Avalon MM IP.

Is there any specific frequency to be followed for On-chip flash memory? Currently i am using 100 MHz frequency.

Signal tap 2 logic analyzer is tapping write signal even wait_request signal is high.

Is there any encryption method to be followed for write operation to on-chip flash memory?

Regards,

Shiva.