Loading file from working folder

Hello,

I can give you an example:

test2:
if test=2 generate
  Process
    file IN_DAT : text open read_mode is "Omnikey.txt";
    variable LI: line;
    variable MV: integer;
	Begin
	    wait for 1 ns;
	    while not (endfile(IN_DAT)) loop
        	    wait for 10.26 ns;
        	    readline (IN_DAT, LI);
        	    read (LI, MV); 
        	    adc <= std_logic_vector(conv_signed(MV,12)) XOR X"800";
        end loop;
        file_close(IN_DAT);
        wait;	    
    End Process;
end generate;    

The data file looks like this (more lines to follow):

-

25
1194
1681
1096
-293
-1439
-1755

adc is an input port for a 12 bit ad converter at the DUT. The 10.26 ns cycle isn't

the adc sampling rate, but the corrected sampling rate of recorded test data, this

way I present realtime test data with correct timing.

I hope that helps,

Frank