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Altera_Forum
Honored Contributor
14 years agoLaboratory Exercise 12
Hello, I need a help to solve the first part of exercise 12, Basic Digital Signal Processing. I'm using the libraries provided "lab12_design_files." Insert the following code in the correct ...
Altera_Forum
Honored Contributor
13 years agoI also have a question regarding this lab. When I was trying to the pin assignment, I got this huge list of pins that I needed to assign, like hex display, leds,... Which one's do I need to assign? Is there a pin assignment sheet for this lab? Also, what does it mean for "ready_signals" to be asserted? Does that mean we raise the value to high or something?
I don't understand what this mean, "The first element of the buffer is always visible on the readdata left andreaddata right outputs when the read ready signal is asserted. The next element can be read by asserting the read signal, which ejects the current sample and a new one appears one or more clock cycles later, if read ready signal is asserted." I tried to implement this by using if statement and process, but I don't they want us to use them since you have to include libraries to do that, and they won't work in that code. Any ideas? Thanks.