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Altera_Forum's avatar
Altera_Forum
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14 years ago

Laboratory Exercise 12

Hello, I need a help to solve the first part of exercise 12, Basic Digital Signal Processing. I'm using the libraries provided "lab12_design_files." Insert the following code in the correct ...
Altera_Forum's avatar
Altera_Forum
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13 years ago

If you give one solution "as is", fmvnunes and lxpool will just copy-and-paste without understanding.

I guess this exercise is very very very basic (not carefully read the "how to" of the codec). Just make D flip flop (no resample here, just copy input to output). It is the "hello world" of VHDL.

@azonegrpz : it may be an other problem that we can bring solution.