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Altera_Forum
Honored Contributor
14 years agoLaboratory Exercise 12
Hello, I need a help to solve the first part of exercise 12, Basic Digital Signal Processing. I'm using the libraries provided "lab12_design_files." Insert the following code in the correct ...
Altera_Forum
Honored Contributor
14 years ago@noa234ham, sorry to remind you : On the 1st post (http://www.alteraforum.com/forum/showpost.php?p=151553&postcount=1) read_s and write_s are always '0' after synthesis.
He should try working examples to see if hardware and software are OK. they should exist.