Internal memory???

Hello,

as I see, UP2 uses an oldfashion Flex10K70 FPGA (from those days, as FPGA complexity has been counted in gates yet), thus the options for using internal RAM are rather limited. Particularly, no JTAG connection to internal resources at runtime is provided, thus previously mentioned "In-System Memory Content Editor" isn't available.

However you're always able to write data to *.mif or *.hex and compile it to a ROM. Cause the UP2 board has no additional external memory, I would try this first. Another option would be to provide a parallel interface at the expansion port, where byte data can be written from PC LPT port. Cause FLEX10K has 5V supply, this would work without additional buffer hardware.

Regards,

Frank