Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Implementation of Digital PID controller in FPGA

I'm trying to implement a PI controller in FPGA using schematic entry method in altera quartus II . I'm using the following equivalent PI controller equation, c(n) = c(n-1)+kp*(e(n)-e(n-1))+Ki...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Simply, when adding numbers without providing extra result bits, the result may overflow to opposite sign, e. g. in case of an integrator 

integ <= integ + x;

In most real control applications, overflow results in fatal failure, e. g. with said PID controller. Saturation arithmetic prevents from this situation. 

integ <= SUM(integ,x);