Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Implementation of Digital PID controller in FPGA

I'm trying to implement a PI controller in FPGA using schematic entry method in altera quartus II . I'm using the following equivalent PI controller equation, c(n) = c(n-1)+kp*(e(n)-e(n-1))+Ki...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi all,

Te code of FvM is well written but I am not sure what is its purpose.

You only need to clip (saturate) if you are going to discard one or more MSBs.

If you discard LSBs then there will never be the need for saturation, possibly you may go for rounding.

In short:

Truncation of one LSB = divide by 2 so no clipping needed but rounding.

Truncation of one MSB is relatively = multiply by 2 because you would discard one LSB bit less so it needs clipping

To implement saturation in schematic or HDL:

Just test the MSB you want to discard: if it equals the opposite of sign bit then fill up data with that opposite.

Note however, in many real systems you should avoid clipping as it affects signal integrity.