Implementation of Digital PID controller in FPGA

Warning (14130): Reduced register "lpm_dff0:inst9|lpm_ff:lpm_ff_component|dffs[0]" with stuck data_in port to stuck value GND

Warning: Output pins are stuck at VCC or GND

Warning (13410): Pin "output[0]" is stuck at GND

These warnings make sense after looking at the schematic. The two multipliers before the add are doing a multiply by 2 so the result will always be even, thus bit 0 will always be 0.

Also noticed that The two dff on the top left(inst1 and inst2) are 16 bit but should be 8bit. When I double click them, the megawizard shows them as 16 bit. Not sure if this is a problem. I fixed that issue and ran a modelsim simulation and the simulation shows data coming out of the dff of inst9.

synthesized_wire_11 is the output of dff(inst9)