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I'm trying to implement a PI controller in FPGA using schematic entry method in altera quartus II . I'm using the following equivalent PI controller equation,
c(n) = c(n-1)+kp*(e(n)-e(n-1))+Ki*T*e(n-1)
where,
c(n) = controller output
Kp= proportional constant
Ki=integral constant
e(n)=Reference -actual input
T=sampling period
I'm implementing it for 8 bit data. I couldnot implement c(n-1) in the above equation using schematic entry. Can someone help me implement this? I would be grateful if you can suggest me other ways of implementing PI controller like in VHDL.
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Hi,
can you post your schematic ?
If you don't what to use VHDL , maybe Verilog could be a choice ?
Kind regards
GPK
Honored Contributor
