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Altera_Forum
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17 years ago

Implementation of Digital PID controller in FPGA

I'm trying to implement a PI controller in FPGA using schematic entry method in altera quartus II . I'm using the following equivalent PI controller equation, c(n) = c(n-1)+kp*(e(n)-e(n-1))+Ki...
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Altera_Forum
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17 years ago

You need to figure out why the data_in port is being reported as stuck at GND. You could post a quartus archive of the design and I'm sure you would get feedback that would solve the issue.