Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorImplementation of Digital PID controller in FPGA
I'm trying to implement a PI controller in FPGA using schematic entry method in altera quartus II . I'm using the following equivalent PI controller equation, c(n) = c(n-1)+kp*(e(n)-e(n-1))+Ki...
Altera_ForumHonored Contributor
Honored ContributorYou need to figure out why the data_in port is being reported as stuck at GND. You could post a quartus archive of the design and I'm sure you would get feedback that would solve the issue.
