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HBin0's avatar
HBin0
Icon for New Contributor rankNew Contributor
5 years ago

I use DSP Builder in Quartus Prime Pro 19.4, When I setup generate hardware option in CONTROL BLOCK， run simulink simulation ， failure is reported

Error reported by S-function 'mip_control' in 'lms/Control': Failure to redistribute delay in [lms_Subsystem] - negative cycle (0) Sub | lms_Subsystem | { } (0) Add_PostCast_primWireOut_sel_x | l...
HBin0's avatar
HBin0
Icon for New Contributor rankNew Contributor
5 years ago

I find ， if my design have loop path, this error easyly occured , I want to know, what reason will reult in this error? I am writting book about intel fpga to DSP. i think i should tell my reader how to avoid this error ,

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago
Hi, Thanks for your update. For your information, would you mind to create a test design probably the simplest form ie with single loop path which could replicate the error and share to me. I would like to highlight to Factory to seek further clarification. Thank you very much for your help. Best regards, Chee Pin