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BlackByte10xy's avatar
BlackByte10xy
Icon for New Contributor rankNew Contributor
5 years ago

I have a question about verilog!

Hello, I have a compile error in quartus II when I try to do a counter with asynchronous reset. The error comes from the sensitivity list of the always process. The part of the code is as follows: ...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
5 years ago

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.