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Altera_Forum
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15 years ago

İnitialization Ram with VHDL

Hi, As you know, in Verilog, initialize $readmemh code is initialized Ram simply. I searched a VHDL code like this but i can't get. Do you help me to find this code? If you know a sample, can y...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

from a simulation ( i have an image in jpg ==> i trasnfert it in mif file ligne by ligne ) then i have a bloc creating in vhdl who will read from the ROM the pixels one by one and do some processing and give in result another value for the pixel (like a convolution) me i want to write this result in a file so i can use it after in MATLAB.

I hope i was clear .........