Forum Discussion
SSale9
New Contributor
7 years agoHow to see all inputs/outputs in node finder?
Right now I'm trying to create a system comprised of multiple modules (new to Verilog), and I can only ever see the nodes in the top-level entity when in the node finder. As an example, I have writt...
AndyN
Occasional Contributor
7 years agoIf I'm understanding what you are trying to achieve, you need to put a top level wrapper above these modules that will instantiate the modules you want. If you just tell it to use exampleMod1 as your top level, it isn't going to include 2 and 3 in the design.
Something like this:
module topWrapper (a, b, c, d, e, f, g, h, i, j, k, l);
input a, b, e, f, i, j;
output c, d, g, h, k, l;
exampleMod1 mod1 (
.a, .b,
.c, .d
);
exampleMod2 mod2 (
.e, .f,
.g, .h
);
exampleMod3 mod3 (
.i, .j,
.k, .l
);
endmoduleHope that helps,
Andy