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Altera_Forum
Honored Contributor
Honored Contributorhelp vhdl bloque 7-seg in vhdl
Hello I have any questions on the 7-seg to the DE2 board it Is conceivable to pgrogramme this billsticker in VHDL !! i dont use NIos 2 !! thx
Altera_ForumHonored Contributor
Honored ContributorIn previous example, the ouput s refers to "gfedcba" segments.
And a certain polarity.
