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JMccu10's avatar
JMccu10
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6 years ago
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Hello, Why are unused LEDs dimly lit but the rest of the FPGA is working as expected? What is the best way to ensure all unused LEDs are off? Thank you, Jeremy

The code is working fine except that LEDs [9:1] are dimly lit. I am using the free software - Quartus Prime Lite 18.1 and the ModelSim. module Mux_4_to_1 (Mux_Out, Sel, Mux_In); input [1:0] Sel;...
  • KhaiChein_Y_Intel's avatar
    KhaiChein_Y_Intel
    6 years ago

    Hi,

    You have to solder the JP5 2-pin header only if you are using the dual image boot function on the DE10-Lite board

    Thanks.

JMccu10's avatar
JMccu10
Icon for New Contributor rankNew Contributor
6 years ago

Hello YY,

Thank you for your reply.

What example design are you referring to? I have ran the Control Panel and this seems to work perfectly. I ran the VGA_Pattern demonstration file and it works perfectly.

I have finished a few small proejcts and so far they all show 100% Timing Analysis when I finish compiling using Quartus Prime Lite 18.1. Is this what you meant by timing clean project?

Also the projects work as expected..except that unassigned LEDs are dimly lit after I load the DE10 Lite. Now I do not have an SDC file in my projects but I have tried this by using the System Builder but I still have the issue.

Thank you,

Jeremy