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MAlha
New Contributor
New ContributorGreetings, How can I perform pass-through fitting (place and route)
Greetings, I'm trying to implement the following design on a Cyclone II DE2: It is a cell of a special type of a PUF (physically unclonable function) called the TSRAM PUF, where it consists o...
GuaBin_N_Intel
Contributor
ContributorIn FPGA architecture, there is no tristate primitive component in the core, specifically in LE block. Look at Cyclone II LE structure https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyc2/cyc2_cii5v1.pdf, Figure 2-3 Tristate only exists at the input or output port. So this is why your "tristate inverter" is translated to a mux. It is not possible to implement such design in FPGA.
