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Altera_Forum
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10 years ago

FPGA to HPS Communication wth External Avalon

Hi Friends, I have the Terasic DeE-0 Nano Development board with Cyclone V and ARM Cortex HPS. As a part of my project, I have send some huge amount of data ( in megabytes ) from FPGA to HPS and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hello,

Let read error message again and try to understand it. Your HPS_SDRAM's Avalon master's address width is 30 bits ( to address 0x0 to 0x3FFF_FFFF, 30 bits are required. ) while avalon slave to which you are trying to connect your master requires 32 bits ( to address 0x0 to 0xFFFF_FFFF, 32 bits are required.) Hence this error message is reported. One possible way to solve this is to increase address width for your avalon master. Double click on your HPS_SDRAM component and see whether it is possible to increase its address width.

Thank you,

Bhaumik