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Altera_Forum's avatar
Altera_Forum
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13 years ago

Files seem to be missing from Qsys synthesis of UP entities

Gentlemen, I am working on a Qsys project involving the UP 16x2 LCD display and 3 UARTS on a DE2-70 board. The Qsys generation of the NIOS processor works fine with no errors or warnings. However,...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thanks, Dave,

I have run into one more issue. I am using the web edition of he Quartus II software. Am I correct is assuming that I cannot use the NIOS processor except on a tethered or time limited basis without a separate license?

That is a real deal breaker for using this approach. My fallback position for using either my DE0-NANO or DE2-70 board is to do everything in Verilog. I am a retired individual and could not justify a great expense for a license.

I appreciate again the time you have spent of this issue. One of the great benefits of forums like this.

Regards,

Geof

PS: with the Cheers signoff are you an Aussie?