Honored Contributor
Honored ContributorHi,
I don't quite follow you... static power is that of routing/logic module/io dynamic power is that of clocked logic and depends on clk frequency and toggle rate. If you don't have clock you don't have dynamic or else put a clock to register your logic. toggle rate is meant to be 100/% for any signal that toggles up/down on every clock(clk itself is viewed as 200% by power analyser). for 16 bit counter the toggle rate is 12.5% average of all 16 outputs. If you use power analyser, first set simulation output file to SAF then run a simulation then go to power analyser and set it to SAF Alternatively do your own toggle rate(not easy)
