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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

DM9000A problem with sending packets

Hi guys, I have a problem with my DM9000A project. My project is sending packets from FPGA to PC using only VHDL codes to program. Some parts I copied from internet. Then I used wireshark to calculat...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

it has been a week and I has been checking my project from the beginning. As far as I know, there is nothing wrong with my DM9000A controller block, and I'm still working on UDP/IP block. But as I said before I am f***ing noob, so with 400+ views, I really hope that someone could give me a hand :(

zero1711's avatar
zero1711
Icon for New Contributor rankNew Contributor
2 years ago

Hi. I am currently working with DM9000A. Have you been able to correct errors in your project yet?