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Honored Contributor
Honored ContributorDM9000A problem with sending packets
Hi guys, I have a problem with my DM9000A project. My project is sending packets from FPGA to PC using only VHDL codes to program. Some parts I copied from internet. Then I used wireshark to calculat...
Altera_ForumHonored Contributor
Honored ContributorSorry, but you need to debug it and come back with a more specific question that someone might have a chance to answer.
One easy way to fix it would be to go back to "Some parts I copied from internet" and review what you have done differently, assuming you have good faith that what you found on the internet actually worked in the first place.
