Altera_ForumHonored Contributor12 years agoDM9000A problem with sending packets Hi guys, I have a problem with my DM9000A project. My project is sending packets from FPGA to PC using only VHDL codes to program. Some parts I copied from internet. Then I used wireshark to calculat...Show MoreDM9000A.zip6.9 MB
Altera_ForumHonored Contributor12 years agoso my codes are TOTALLY wrong? My first project...:( poor me :( Any way i can fix this? :(
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