Forum Discussion
Altera_Forum
Honored Contributor
10 years agoRicardo,
I haven't got much progress, because I'm envolved with a project with this board and we haven't started coding yet. Dav, We will need the PCIe bus for low-latency and high data exchange rate between the FPGA and the CPU. This is due to the fact that we will be working with computer vision, and we want our system to be relatively responsive. Unfortunately, I can't give any numbers since I haven't started developing yet, but it would suffice to know if the driver can support up to the maximum transfer rate, which I believe is of 250MB/s. The code that I can't find would be the driver code. The SystemCD that I can download from the terasic website only gives me an installer with the windrv stuff inside and no code to access. This driver seems to be made with WinDriver or something. But also it would be great to have access to the libraries source codes, not only the TERASIC_PCIE.h header, so that we could see how the communication is made in low level, and be able to personalize it. Many thanks.