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Honored Contributor
Honored ContributorDE2-70 and video_sync_generator
Hi I am trying to make a design using the video_sync_generator component on a de2-70 board, but i am getting strange results. For testing purposes,i connected the tree color component(Red,Green ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Hi. Don´t connect the R,G,B to Vcc, instead assign a value to them, while the scan time is the correct. Speaking about H signal, it is after H blanking, and before the next H blank pulse. Regards. Alberto. --- Quote End --- Hi i am not sure to follow the "assign a value while the scan time is correct" part .My design is not using any .verilog (or vhdl ) file , all is done in a schematic file. Still for investigating , i modify the video_sync_generator.v file and redirect the output.Instead of having the output RGB_OUT connected to the data_input, , i directly assigned a constant to the output signal but i still get a black screen instead of a white screen Thanks
