Forum Discussion
Altera_Forum
Honored Contributor
8 years agoI found the issue, i used the audio_pll (12.288MHz) for the audio ip core, now i'm using the 50MHz sys clk and it works.
But its strange that the design only works with 50MHz.I found the issue, i used the audio_pll (12.288MHz) for the audio ip core, now i'm using the 50MHz sys clk and it works.
But its strange that the design only works with 50MHz.