DE1 Altera UP Flash Memory IP Core, No CFI table found & Error code: 8

Hey again. I got the flash working so I decided to post here in the hope that it might be beneficial to others. Firstly I was unable to get the UP IP Core working no matter what I tried. Instead I used a CFI flash controller + a tristate conduit bridge. The flash portion of the 5th lab here (SRAM Flash Interrupt): http://www.csun.edu/~glaw/ee520.htm was very helpful.

So the overall steps to get the flash working were:

1. make qsys changes according to pdf tutorial

2. make pin assignment for the FL_CE_N pin at PIN_AB15 (is missing from the DE1 pin assignment qsf file)

3. make connections in top level entity

4. change read out, write out, and chip select to standard logic (from std_logic_vector(0 downto 0)) as given here: http://www.alterawiki.com/wiki/new_qsys_issues#tri-state_conduits_and_vhdl_component

5. set fl_rst_n <= '1'

After this the CFI is detected fine and the flash programs correctly. I got the zipfs working as well. Hope this helps somebody. It doesn't seem like this part of the forum is very active so perhaps Altera should look into it, if someone from altera actually ever reads this lol.

Ammar