DE0: Nios 2 with custom logic and PIO.

Have a look at chapter 10 of that document (http://www.altera.com/literature/ug/ug_sopc_builder.pdf).

For a simple compenent like yours, you should just need a 'write' signal (std_logic) and a 'writedata' signal (std_logic_vector) on your avalon slave interface. They are both inputs, and when write is '1', read the contents from 'writedata'.

You should also have a clock input interface (clock and reset signals) and a conduit interface for the PWM signal that you generate.