Forum Discussion
Occasional Contributorcustom ip core configuration
Regular ContributorHi,
Refer the "1.2. Generating IP Cores (Intel Quartus Prime Pro Edition) " from link below & configure the different parameters of IP in parameter editor & then add the instance of that IP core in top module of your project & eventually perform compilation & simulation.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_intro_to_megafunctions.pdf
Regards,
Vicky
Occasional Contributorthank you vicky, I will have a look on it.
- rkaib
hi vicky,
not yet I am still working on it,
I have tried to configure it as shown in your reference, added it to the main verilog code, but it seem that it is not detected while in eclipse.
my IPcore is very simple, it just requires clk, rst as inputs and produces a 32 bit signal (without any parameters).
my goal is just to read this output data in eclipse.
I can provide further information if needed.
Thanks
