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Altera_Forum's avatar
Altera_Forum
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10 years ago

Communication between FPGA and PC through Ethernet

Hi everyone,

I'm trying to communicate between FGPA and my own laptop by setting up an Ethernet connection. The most simple thing I want to achieve first is to send a ping command from my FPGA to the laptop and the returned values can be printed on the console of the Nios II Eclipse (just as you send a ping message from cmd in Window to a random web-page). Any one can show me some steps to complete the task?

Thanks in advance.

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hello,

    So before you can create your design you should get familiar how computers talk. Their are different type of protocols that allow this. Your fpga will be to be able to remove this protocols headers and understand what the computer wants. The simplist method I know of is by using nios with a rtos with tcp service. You can google it and find some tutorials in setting it up. Their is actually a example built in to eclipse. You would then need to establish a connection to the pc through a designated port, this would need to set up on the laptop. If your just trying to ping the laptop, you might just need to start the fpga in dhcp mode. Sorry for the information overflow, if you can't find a tutorial i can post one for you when I get on a desktop :)

    -trukng
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I really appreciate your detailed and helpful response.

    Yes, I'm going to establish the connection by using TCP/IP and I'm intended to use the Ethernet port on the kit. Next I'm going to use a program called "Dummynet" to control the network traffic between these 2 devices.

    Any extra information or document from you could be a great help for me. Thanks so much.
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    nam_hoang_310,

    Here is the link to the tutorial https://www.altera.com/en_us/pdfs/literature/tt/tt_nios2_tcpip.pdf . This link will provide the qsys system for the nios. https://www.altera.com/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-net-std-de.html . This tutorial will help setting up the nichestack which handles the TCP protocol in nios. The nichestack requires a real time operating system which is free until you start manufacturing it. Try it out , let me know how it goes :)

    -Trukng
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Thank you so much for the links, however I'm now having to deal with cyclone II kits, which are not supported by those links given. Any other recommendations. Thanks.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    You can use this design as an example. i believe that you can us th same qsys system since it doesn't use anything different other than the pins. The triple speed Ethernet Mac should still work. I have upgraded this design to stratix v and it worked fine. I don't think there is anything directly to a cyclone 2. Hope this helps.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Mohammad,

    Yes you can upgrade it to support Different type of connections. I believe the tutorial is set up for what you mentioned but you can change it. I did it by using the nichestack tutorial and modifying the way it was establishing connection on the Nios side. The firmware will still be th same, you can also enable it to use dhcp when you hook it up to you network. You can make a server application on the pc side and let nios establish the connection. I can look for the tutorial I used when I did this.

    -Trukng
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    --- Quote Start ---

    You can use this design as an example. i believe that you can us th same qsys system since it doesn't use anything different other than the pins. The triple speed Ethernet Mac should still work. I have upgraded this design to stratix v and it worked fine. I don't think there is anything directly to a cyclone 2. Hope this helps.

    --- Quote End ---

    Hi,

    Everytime I open the eth_main_std_system.qsys file it notifies me an error "the given combination of pll input and output cannot be synthesized". How can I fix this because as far as I know this error only happens to cyclone IV devices?
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I will look into it. I didn't get that problem last time. I think it might be related to the device package.

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Oh well, seem like I have identified the problem, which is cyclone II does not supported the DDR SDRAM component. How can I modify this to suite the design.

    Regards.