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Altera_Forum
Honored Contributor
14 years agoFor example all your 3 blocks are supposed to control the r[0] output.
You can't connect them in parallel because each line would drive a defined state, high or low, so there would be conflict. You must use a OR3 gate: this is an OR gate with 3 inputs which will receive r[0] from your 3 blocks, while the ORed output will drive the fpga pin, namely the right light. Same for other r lines and same for other signals: use OR3 or OR2 depending how many sources you need to mix.