Can de0-nano work with high speed ADC (such as AD9283)?

As Dave said, real-time processing 20MSPS with NIOS is not practical (it can't do anything in a single clock, and your algorithm/filter would have to be trivial even at Fmax for your FPGA).

Although the SDRAM has ample bandwidth for what you would like to do, you also have 600kbit of FPGA onchip RAM capable of holding the entire window and which you may find more straightforward to deal with.

e.g. dual-port RAM or FIFO, with one side being written by the ADC.