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Altera_Forum's avatar
Altera_Forum
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18 years ago

Building serial communication...

Hi, I am using a FLEX10K UP2 board and want to do some image processing on it. I would like to build an 8-bit internal RAM for my FPGA in order for my design file to write data to the RAM and r...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hi,

Thanks for all the advice. I now studying the design reference as provided in Opencores.org.

But how do SignalTap, Memory Content Editor and all these functions affect my UART design?

Thanks!!!