Honored Contributor
Honored ContributorAssuming you are programming the Altera NIOS II processor (you never say, but these are the opcodes you are using...), there is no NOT instruction.
However, it can be synthesized in a number of ways, the simplest using the NOR instruction with the source register duplicated.
nor r5,r5,r5 ; ones complement of value in r5
nor r3,r4,r4 ; ones complement of value in r4 to r3
.text
.global _start
_start: ldw r2, NUM(r0) /* Loading hex value from the .word directive. I will use that hex number''s binary equivalent. */
mov r5, r0 /* Register is the counter, and increments by one, leaving the last incremented value to be the max number of consequtive 1''s. */
LOOP: beq r2, r0, END /* This loops until r2 no longer contains 1''s in its binary value. */
srli r3, r2, 0x1 /* Shifts binary value of r2 to the right and stores that shifted value into r3 */
and r2, r2, r3 /* ANDing the binary of r2 with the shifted binary of r3 so that all 1''s now ANDed with 0''s turn to 0, and then overwriting r2 with the new binary result */
addi r5, r5, 1 /* Incrementing counter by 1. */
br LOOP /* Relooping this until there are no more 1''s in the binary value of r2. */
END: br END
NUM: .word 0x3fabedef /* This is the value who''s binary value will be assessed for max number of consecutive 1''s. */
