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skyviper's avatar
skyviper
Icon for New Contributor rankNew Contributor
1 year ago

Become an FPGA Designer in 4 Hours SDRAM controller IP outdate

In the "Become an FPGA Designer in 4 Hours" course the ../demo/cores/sdram_ctrl/synthesis/sdram_ctrl.qip is out of data with Quartus prime 23.1std.1. I get entity errors when trying to use the IP upg...
University Program
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi,


We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum case, did not reach us as intended. As a result, we have a backlog of cases that we are currently working through.


Please be assured that we are doing everything we can to resolve this as quickly as possible. This will take some time, and we appreciate your patience and understanding during this period of time. Thank you again for your patience and understanding, and we are committed to provide you with the best possible support.


Do you have the link to that course and the source code?


Regards,

Adzim