about the Reset_Delay.v in DE2_D5M

Hi, I have been working with the TRDB-D5M Terasic Camera module. I have noticed that this sample code also has got the Reset_Delay which generates 3 reset signals. I understand that these delays have been chosen randomly, yes well within 1sec. If you look at TRDB-D5M code, RST_1 is 42ms, RST_3 is 63ms and RST_2 is 0.36 sec. These are fed to various modules. This is believe is to have an orderly turnining on of each of the modules. Also, a certain start up time needs to provided before the Camera data can be read in this case, since some initial time is used for Camera registers to be configured.