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Altera_Forum
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11 years ago

a DE1-SOC + VIP (TPG+VCO) does synthesize but does not simulate

Hi ! I've been designing a very simple design. This is a test, inspired from Terasic's video demo to see how the clock and reset networks are set. This is a TPG connected to the video out c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I'd recommend filing a Service Request directly with Altera.

While you are waiting, you could also try an older version of Quartus, eg., look at whatever ships with your Terasic hardware (open the .qsf to see what the last version of Quartus used was), and use that version.

Cheers,

Dave