Occasional Contributor
Regular ContributorHi,
Depending on the exact bootloader and SoC device family, the handoff can take various forms. For Intel Stratix 10 SoCs, the handoff information is part of the FPGA configuration bitstream.
Based on my knowledge, a "hps_isw_handoff" folder will be created when you have compiled your project successfully in Quartus when using Cyclone V Soc or Arria 10 SoC boards. For Startix 10 SoC the handoff information is located in the "output_files" directory of your project folder.
You can find the demonstration of the steps when the handoff information is created below in the "Compiling Hardware Design" tab: https://rocketboards.org/foswiki/Documentation/S10GSRDCompilingHardwareDesign180
We also have this documented in our website available here:
https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-guidance/soc-bootloader.html
From above link, you can direct to the "Hardware Handoff" section on the left side where you can find more information regarding the handoff information.
I recommend you check https://rocketboards.org/foswiki/Main/GettingStarted to learn more on other topics as well.
Let me know if you need more help.
Thanks.
Occasional ContributorI need more help.
Even after looking at those links, I still don't see an obvious description of how to "import" the quartus/qsys design into Eclipse to generate linker scripts and header files to develop embedded software. Surely this is a common task. I tried pointing the bsp-editor tool to "output_files" as you indicated, but I get "Invalid Preloader settings directory. The Preloader settings directory "C:\...\output_files" is invalid. Please select a directory which contains hps.xml and emif.xml."
A lot of tutorials are geared towards building u-boot and linux, which I am not ready to do. I just want a basic bare metal application right now. Is there a step-by-step tutorial for a simple "hello world" for the stratix 10 SoC?
