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AJama4's avatar
AJama4
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Running bare-metal from SDRAM memory. Error

I am using De1-SoC board. Cyclone V (Cortex-A9). As far as I understand the base address of the SDRAM memory in the MPU address space is 0x00100000 and the ending address is 0xC0000000 by default. It...
AJama4's avatar
AJama4
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Hello,

BSEL switch is absent so the setting is the default one by Terrasic.

EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

Can you load the preloader first to make sure the SDRAM has been calibrated successfully? Only then you are to create and apply the scatter file, since the SDRAM has been brought up from preloader.

Replying back to your first posts, can you direct me to the TR-manual which demonstrate the scatter file that you mentioned?

This is the link to locate the bare metal application in the SDRAM by creating a new scatter file, is this the examples you tried to follow?:

https://www.intel.com/content/www/us/en/programmable/documentation/lro1424280108409.html#lro1424311442722