Occasional Contributor
Occasional ContributorHello,
BSEL switch is absent so the setting is the default one by Terrasic.
Regular ContributorHi,
Can you load the preloader first to make sure the SDRAM has been calibrated successfully? Only then you are to create and apply the scatter file, since the SDRAM has been brought up from preloader.
Replying back to your first posts, can you direct me to the TR-manual which demonstrate the scatter file that you mentioned?
This is the link to locate the bare metal application in the SDRAM by creating a new scatter file, is this the examples you tried to follow?:
https://www.intel.com/content/www/us/en/programmable/documentation/lro1424280108409.html#lro1424311442722
Occasional ContributorHi,
The scatter file was being written by me after reading the default SDRAM base address (starting) and ending address in MPU address space. I am first loading the preloader and then trying to run the bare-metal.
I have already followed the aforementioned example and its not working.
After, making some changes, now my preloader works fine without error; but still the bare.metal program doesn't load from the SDRAM.
Here is the output in the terminal (for preloader):
U-Boot SPL 2013.01.01 (Aug 27 2019 - 08:37:10)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 925 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 50000 KHz
CLOCK: QSPI clock 370000 KHz
RESET: COLD
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 1024 MiB
SDRAM: Ensuring specified SDRAM size is correct ...passed
SDRAM: Running EMIF Diagnostic Test ...Passed
Occasional ContributorHave you tested the example you mentioned on any De1-SoC Board?
Regular ContributorHi,
I did the example a month ago, followed all the steps and able to see the entry points stops at the point of the scatter file which was 0x02000000,
Can you edit you scatter file to this:
SDRAM 0x02000000 0x02000000 ;
{
APP_CODE + 0
{
* (+ RO , + RW , + ZI )
}
ARM_LIB_STACKHEAP 0x03000000 EMPTY 0x0x01000000 ; Application heap and stack
{ }
}
