how to access f2h sdram through hps

Hello,

F2H SDRAM bridge is used to access DDR memory of HPS side by FPGA master (processor, DMA, or JTAG Master). You can read/write without any issues. the only thing that need to be considered is, the bridges should be enabled. To make this safely, let HPS configures the FPGA, and boots linux; on this case, you will guarantee the bridge enablement.

If you want to access DDR from HPS side, this can be done easily by using memtool in linux, you can read and write the DDR.

For DMA, you have to initialize the DMA to do the job for you. usually we use Nios II to configure the DMA, and then the DMA will transfer the data from FPGA side, to SDRAM HPS side. I am attaching an example of how to do that.

Thanks

Hello,

thanks for your reply,but i still don't clearly about the relationship between the DDR3 and the f2h SDRAM address.if i add 6 f2h SDRAMs.how can i Map the address relationships between them and the DDR3. every SDRAM address is 0x00000000~0xffffffff,what is the DDR3 address? for example ,i use DMA,should i control the DMA descriptor to access the DDR directly,and then access DDR through hps directly.I'm sorry it's my first time use tse and scatter-Gather DMA ip core.i referred the design downloaded in

https://rocketboards.org/foswiki/Projects/AlteraSoCTripleSpeedEthernetDesignExample?rpm_id=8083970&erpm_id=8083970&erpm_id=8083970&erpm_id=8083970&erpm_id=8083970&erpm_id=8083970&erpm_id=8083970&erpm_id=8083970&erpm_id=8083970&_ga=2.113202945.401678115.1550048297-1001826037.1545013780&erpm_id=8083970l