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TBaox's avatar
TBaox
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5 years ago

ARM A9 bare matal IRQ priority can't work

I use cyclone V HPS, and there is a problem in configuring interrupt priority. I gave OSC1 TIMER a higher priority, and after the program was executed, I found that it could not preempt the low prior...
TBaox's avatar
TBaox
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5 years ago

Quartus Prime 17.1

and SOC EDS 17.1

  • TBaox's avatar
    TBaox
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    5 years ago

    Sorry,I can't open the second link.

    • EBERLAZARE_I_Intel's avatar
      EBERLAZARE_I_Intel
      Icon for Regular Contributor rankRegular Contributor
      5 years ago

      Hi,

      Unfortunately, the link is no longer available.

      May I know, how did you setup/configure the prioritization? Did you have the H2f/f2h bridges enabled?

      • TBaox's avatar
        TBaox
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        5 years ago

        I use this function and I have enabled H2f bridge and light H2F bridge, unuse f2H bridge.

        //set prioritization

        alt_int_dist_priority_set(ALT_INT_INTERRUPT_F2S_FPGA_IRQ0,48);