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TBaox
New Contributor
New ContributorARM A9 bare matal IRQ priority can't work
I use cyclone V HPS, and there is a problem in configuring interrupt priority. I gave OSC1 TIMER a higher priority, and after the program was executed, I found that it could not preempt the low prior...
EBERLAZARE_I_Intel
Regular Contributor
Regular ContributorMay I know which Quartus version you are using? Also how did you compile/setup your preloader files?
TBaoxNew Contributor
New ContributorQuartus Prime 17.1
and SOC EDS 17.1
- EBERLAZARE_I_Intel
Hi,
Please check the ARM document on the Interrupt prioritization:
You can also check out the example design below on GIC controller:
ftp://ftp.intel.com/pub/fpgaup/pub/Intel_Material/16.0/Tutorials/Using_GIC.pdf
- TBaox
Sorry,I can't open the second link.
- EBERLAZARE_I_Intel
Hi,
Unfortunately, the link is no longer available.
May I know, how did you setup/configure the prioritization? Did you have the H2f/f2h bridges enabled?
