Yet another PUF issue.

There are several module sources missing from the project.

As you can see from the technology map view, the basic bpufslice is made up as a combinational loop through six logic cells, making it difficult to force a more symmetric place and route of the design manually. I would try with a slice that uses less logic cells.

I already didn't understand the purpose of the one signal, that requires some of the extra logic cells.

Generally, the result seems to confirm my assumption from the previous PUF discussion:

--- Quote Start ---

As one point, it seems questionable if the accidental delay skew, that is utilized by this technique, has a considerable amount compared to systematic and reproducable routing delays.

--- Quote End ---