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MPaso's avatar
MPaso
Icon for New Contributor rankNew Contributor
7 years ago

Writing to DDR3 with bypassing NIOS2

Hello everybody i have been now struggling for a week. I have a Qsys design, with nios2/f, ddr3 and onchip memory. I have implemented a tightly coupled instruction and data bus. I can compile and...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
7 years ago

It's not clear how you want to access the DDR3 from outside the system, but instead of the custom component you've created, use a pipeline bridge. You'll set it up basically the same as what you've created here (export the slave side; connect the master side to the slave memory interface).