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Altera_Forum
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8 years ago

Writing Fast State Machines using SystemVerilog

Hello, I came across this article that commented on using State Machines with One-Hot encoding. http://www.verilogpro.com/systemverilog-one-hot-state-machine/ The article state, "Ac...
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Altera_Forum
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8 years ago

I always encode states 0 to 2^N-1 for an N-state state machine and let the synthesis tool decide how to build it. Quartus almost always encodes state machines one-hot anyway.