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Using a FPGA board, how to initialize the audio codec chip, WM8731, to 16-bit mode at 8 kHz sampling rate, and the input coming from the LINE IN terminal? I have no idea how to start working on the quuestion. Can any body please help me out? Im a beginner in VHDL and FPGA.
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I have quite the same problem. I'm trying to implement simple LINE IN - LINE OUT circle before starting to write FIR filters for it. I'm aware of how address should be like, I know that there is an example in Verilog, yet I fail to rewrite this code into VHDL because of poor commenting and lack of knowledge in Verilog and sound codecs. If there is a person who has a driver for this codec in VHDL, send the entity or at least give some advice such as algorithm written step by step to the list. I and associate professor, a mentor of mine, would be grateful.
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